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Computer Science

Faculty of Engineering, LTH

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FAQ

Older questions and answers (obsolete):

  1. Q: I cannot use some of the cores (opb_ethernet) because of some licensing error in XPS. What should I do?
    A: Some of the cores are available for free only for evaluation for a limited time. A new license is required if the old one expired. These licenses (files) are host bound and can be requested through the Xilinx IP Evaluation Request Form. If you do not have an account already, you will be required to register at the Xilinx website, however this is for free and takes only a couple of minutes. Follow the instructions on the website and the ones sent to you through email and you will be able to use the licesed cores for another 3 months. Since the files are host specific, you should ask around other groups that might have requested licenses, maybe they already received a license for the workstation you are planning to use.

  2. Q: My program seems to be too big to fit in the BRAM. What's the solution?
    A: Try some of the following...
    • Change the BRAM core size from XPS Add/Edit Cores... The default value for C_MEMSIZE parameter is 2048 (2K), however a VirtexII can host up to 64K words, if no BRAMs are used by other cores. Do not forget to change the BRAM controller address space too.
    • Set the "-Os" (optimize for size) compiler flag and get rid of the debug information in the XPS/Compiler Options.
    • Run your program from SRAM/Flash. The BRAM should contain a small boot loader that only jumps to a SRAM/Flash address. The actual program should be compiled to start from the address your bootloader jumps to. Furthermore, the compiled .elf should be transformed (using mb-objcopy -O binary) into a flat binary image - a .bin file - which is then downloaded through xmd (accessible from XPS) into SRAM.

  3. Q: How do I get a file into the Flash memory of the Nexys-2?
    A: Unfortunately there is no good support for this yet from Digilent if you use the USB cable, however, here is a way to do this with a JTAG3 cable. In XPS, once you have your design (built initially with the wizard) you are able to do Device Configuration/Program Flash Memory. Unfortunately this does not work from scratch, as the the xps_mch_emc_digilent modules provided by Digilent, used to access the Flash and SDRAM are not seen by XPS as multi-channel EMC. Apparently this is due to the fact that XPS requires these to have exactly the name xps_mch_emc. Using a xps_mch_emc_digilent copy, I have produced a module named xps_mch_emc version 3.33a, and packed it into xps_mch_emc_v3_33_a.zip. Unzip this in your project pcores directory first and rescan user repositories. Then alter your project .mhs file to use the xps_mch_emc version 3.33a instead of the xps_mch_emc_digilent version 1.00a. At this point XPS should see that there are xps_mch_emc instances in your design and allow you to download files into any external memory, and even create a bootloader application to help you boot from the Flash.

  4. Q: (Follow up question) I've done all that but when I try to Program Flash Memory I get an error saying that the Flash does not support CIF (when it should, according to the documentation). Using xilflash XPS library to carry out Flash operations also fails at initialisation! Is it something wrong with the Flash?
    A: The problem is in the way the address lines are connected to the external Flash and RAM. For some reason the Digilent wizard manages to shift the address lines left, making A(0) into A(1), etc. This means that some addresses can be read properly, others can not. There is an easy fix for this, implying reconnecting the two util_bus_split cores in XPS as follows:
    • Change the C_SPLIT (First Bit of The Out2 Output Bus) from 9 to 31
    • Change the C_LEFT_POS (The left Bit position of the Out1 Output Bus) parameter of the util_bus_split from 0 to 8
    • Disconnect the core port Out2
    • Connect the core port Out1 to the signal initally connected to Out2, INTEL_FLASH_Mem_A_mem_signal_mux_0_A_F or Micron_RAM_Mem_A_mem_signal_mux_0_A_M, respectively.
    If you re-synthesize the design, you should now be able to Program Flash Memory. If you do not have a JTAG3, you could use the xilflash library to write an application that takes a file from the serial and stores it in the Flash.

  5. Q: The XPS Base system builder Wizard can only build systems for the Nexys-2 with the Spartan 3E 500, but not for our 1200 version. Can't I use the Wizard then?
    A: The XC3S1200e boards are rather new, and the Digilent files are not yet fully supporting them. Check their Nexys-2 website first. A solution would be to use the Wizard for the XC3S500e version and later on change the FPGA settings in the project options. The pins, thus the .UCF should be in principle the same, except four leds that have a different pin layout between the 500 and the 1200 version. To adjust your .UCF accordingly, consult the .UCF file in the Board Verification Project for 1200K-gate boards.

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If you have encountered interesting problems that you could not solve, or you could solve and you want to share the solution with other groups, this is the page. Email your questions/solutions to the course staff.