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Computer Science

Faculty of Engineering, LTH

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HiPEC

2011-01-01

High Performance Embedded Computing

Period: 2011-2016

Project leader: Krzysztof Kuchcinski

Description:
In this project, we address reconfigurable array processor architectures as well as software tools for their programming. A massively parallel execution platform with powerful computing nodes and hierarchical interconnection structure suitable for streaming applications will be developed and studied. The distinct features of our software development approach are the use of the CAL language for programming of these architectures as well as the development and use of tools for timing and energy analysis at early design stages. Combining both hardware and software experts in the same project provides a strong basis for covering the whole spectrum of this new technology.

Partners

  • CS@LU - Embedded System Design group (Computer Science, Lund University)
  • EIT@LU - Digital ASIC, (Electrical and Information Technology, Lund University)
  • HH - Halmstad Embedded and Intelligent Systems research (Halmstad Högskola)
  • LiU - Computer Engineering, (Electrical Engineering, Linköping University)

 Project web: hipec.cs.lth.se

 

 

Computer Science