Lunds Tekniska Högskola

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Outstanding CS MSc day, April 28


Due to popular request, an unscheduled presentation day, with three master's thesis presentations, will take place on the 28th of April, 2016.

April 28 is an outstanding day for master thesis presentations in Computer Science at Lund University, Faculty of Engineering. Three MSc theses will be presented.

The presentations will take place in E-house, room E:2116. A preliminary schedule follows.

Note to potential opponents: Register as opponent to the presentation of your choice by sending an email to the examiner for that presentation ( Do not forget to specify the presentation you register for! Note that the number of opponents may be limited (often to two), so you might be forced to choose another presentation if you register too late. Registrations are individual, just as the oppositions are! More instructions are found on this page.



PRESENTERMagnus Hultin 
TITLEApplication Specific Instruction-set Processor Using a Parametrizable multi-SIMD Synthesizeable Model Supporting Design Space Exploration 
EXAMINERKrzysztof Kuchcinski 
SUPERVISORFlavius Gruian (LTH) 
ABSTRACTIn this thesis, we provide a synthesizable model for supporting design space exploration of application-specific instruction-set processors. The model is written in a high-level of abstraction hardware description language Bluespec System Verilog and is parameterizable to support different configurations for the design space exploration to use. To test the model different applications from the media domain was selected to run on some of the configurations from the design space exploration. The applications were also run on a standard general processor for comparison. 
The results show that there is a performance gain to be had compared to the standard processor, but with a higher cost of resources. With the utilization of the resources the scheduling of the applications turned out to be critical for this performance gain. The synthesizable model also shows there is a consideration of the maximum clock frequency and memory constraints that the theoretical design space exploration model does not take into 


PRESENTERSPhilip Mårtensson, Daniel Olsson
TITLEInvestigation of High-Level Language Support in a Resource-Constrained Embedded Environment 
EXAMINERKrzysztof Kuchcinski 
SUPERVISORSPatrik Persson (LTH), Assad Obaid (Axis Communications) 
ABSTRACTPersonal computers have gained a significant boost in computational power and digital storage space at a reduced cost in the last decade. In the search of increased programmer productivity and cross platform portability, language popularity has shifted from lower level languages such as C to higher level languages such as Java and C#. Most companies dealing with embedded devices still use C. We investigated what effect such a shift would have at Axis Communications. The study was done by setting up C# and Java on a camera and conducting performance tests on it. The analysis showed that when using C# as a replacement for C, we saw improvements in programmer productivity whilst still upholding quality for some applications. For the performance intense use cases, the quality requirements were not satisfied. With the growth of high-level languages, we do see a bright future for the support for them in embedded systems. 


TITLEDetecting anomalies when guiding an industrial robot through tasks
ABSTRACTDynamic training of industrial robots could greatly increase the competitiveness for robots in small and medium sized enterprises. However, less strict learning processes are more prone to human errors. Human industrial tasks consist of a set of activities and actions. Human errors are said to be an anomalous set of activities and actions. If a robot could detect such anomalies it could discard the data instead of storing erroneous data. This thesis investigates the applicability of a Bayesian network to detect such anomalies on a dataset produced by a previous master thesis. The Bayesian network detects patterns in the data, i.e. the inverse of anomalies. Every activity that the Bayesian network can not predict with a 30 % significance does not conform to a pattern and is thus labeled as an anomaly. Using a 4-fold cross validation the prototype has an accuracy of 89.95 % in predicting the activity with a 30 % significance.